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Altera_Forum
Honored Contributor
17 years agoInterNiche driver with Marvel 88E1111
good day.
[recapitulation from other thread]
i am using the cyclone iii development board (ef3c120f7807cn)
the samples included in the dev kit does not include any ethernet. therefore i changed the samples to include a tse mac using the marvel 88e111 instead.
i am getting the a "no free buffers for rx" after phy initialization
=============== Software License Reminder ================ This software project uses an unlicensed version of the NicheStack TCP/IP Network Stack - Nios II Edition. If you want to ship resulting object code in your product, you must purchase a license for this software from Altera. For information go to: "http://www.altera.com/nichestack" ================================================== === Created "Inet main" task (Prio: 2) InterNiche Portable TCP/IP, v3.1 Copyright 1996-2008 by InterNiche Technologies. All rights reserved. prep_tse_mac 0 Your Ethernet MAC address is 00:07:ed:ff:cd:15 prepped 1 interface, initializing... [tse_mac_init] INFO : TSE MAC 0 found at address 0x04000000 INFO : PHY Marvell 88E1111 found at PHY address 0x12 of MAC Group[0] INFO : PHY[0.0] - Automatically mapped to tse_mac_device[0] INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... INFO : PHY[0.0] - Auto-Negotiation PASSED INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... INFO : PHY[0.0] - Auto-Negotiation PASSED INFO : PHY[0.0] - Checking link... INFO : PHY[0.0] - Link established INFO : PHY[0.0] - Speed = 100, Duplex = Full OK, x=7, CMD_CONFIG=0x01000000 MAC post-initialization: CMD_CONFIG=0x05000203 [tse_sgdma_read_init] RX descriptor chain desc (1 depth) created No free buffers for rx No free buffers for rx No free buffers for rx After N Repetitions it Stops. by suggestion from jakobjones it seems that the mac is receiving a packet and trying to allocate abuffer from the interniche stack.
my question is, if this is the reason how can i disable the the mac from sending all the packets to avoid swamping or how to increase the number of large buffers available, i am using version 9.0 thankyou!
11 Replies
- Altera_Forum
Honored Contributor
The 88E1111 has an MDIO interface and is accessed via the tse driver on power up. It should be noted that the phy is read for speed and duplex capability only upon initialization so that the driver can configure the tse to run at the minimum connection/duplex of the link/link-partner pair.
I have a RGMII interface tied to a switch chip with no MDIO between them and have modified the default duplex/connection speed to run at the rate that I am driving the RGMII bus with no issues.