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Altera_Forum
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11 years ago

Internal memory usage using MegaWizard RAM: 2-port

Hi, I am using 8k, 8-bit wide internal 2-port RAM. Here's the instantiation in Verilog: working_ram ram_test ( .data(ram_data_test), // input [7:0] data; .rdaddress(ram_rd_add...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Hi, Unable to share code due to work policy, but 3 images from signaltap are attached in zip. First image has the entire write-then-read op and next two have the zoomed in view of Wr and Rd, respectively. thanks for quick responses...