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Altera_Forum
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15 years ago

Interfacing TSE with Broadcom Gig-E Switch via RGMII

Hi All, I have been assigned the task of interfacing the TSE with a Broadcom 53115 Gig-E Switch via RGMII. I know that the register interface is SPI and that there are roughly 5000 registers in...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hi Slacker -

Clearing Bit 0 of the Broadcom Header Control Register (page 0x02, address 0x03) disables the additional header info/tags (this is between the SA and the type/length field) to the attached ports.

I was, however, planning on using the RGMII port as strictly a LAN port (no IMP) as my application does not need net management (or most of the other functions in the chip). First step has been just getting SPI traffic running...

-C