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Altera_Forum
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14 years ago

Interfacing custom logic to SDRAM controller IP without using NIOS

Hello, Does anyone have experience of writing their own Avalon MM master port in Verilog to interface to the Altera SDRAM controller? I have written the simplest code I could think of to t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Thank you BadOmen, now.. as i said.. I'm a beginner but I wanted to start with the right foot. I'm not sure how to create this Avalon MM Master, so I will begin by reading all about it and how to use the templates, but I would appreciate any other recommendations even though I have a better perception of the problem.