Forum Discussion

FRoth's avatar
FRoth
Icon for New Contributor rankNew Contributor
7 years ago

Intel HDMI core lock times in HDMI 2.0 mode

We are using the HDMI core and we are getting very long lock times (one second or more). We are using a custom patch to mitigate the HDMI 2.0 mode no-internal-data-alignment issue which is still not ...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

Sure.

  1. Regarding HDMI 2.0 custom patch support
  • Higher lock time is expected from custom patch support that’s using the bitslip mode soft logic design
  1. Regarding improvement on HDMI RX lock time
  • Customer can consider to use PHY alignment function that’s enabled via A10 FPGA hard PCS block in A10 HDMI example design.
    • The only catch is this PHY alignment function is enabled together with transceiver data rate reconfiguration function
    • From A10 HDMI example design hdmi_rx_top.v file, rx_parallel_data is generated from output of transceiver RX channel (gxb_rx) then to PHY alignment block (symbol_aligner) before it’s passed to HDMI RX core (mr_hdmi_rx_core_top)