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Altera_Forum
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16 years ago

IIR in DSP-Builder with modified multiplier LUT or multiplie accumulate

Hi, I want to realize a filter bank with 32 x IIR band-pass filter with reduced Multiplier. I have a Altera DE2 board Ciclone 2, FPGA EP2C35F672C6N, possess only 70 9x9 Multiplier. Can someon...
Altera_Forum's avatar
Altera_Forum
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16 years ago

my workstation is a x64 OS Win 7 Prof with 8 GB RAM, thats not normaly that a program go out of memory.

Could you explain me how I can make settings in quartus or in dsp-builder for better work with the RAM?

Is the solution maybe Quartus 9.2 with DSP-Builder 9.2?

Thanks for your answer...

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