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Altera_Forum's avatar
Altera_Forum
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15 years ago

I2C Woes, Opencore and Terasic

I've been trying to get a functional I2C bus in my design for a while now with no luck. I've tried my own and a few open source cores. ALL of them have the same problem. I never receive ACKs. I canno...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I would expect, that the I2C core has no problems to work with open drain SCL operation, which is according to the standard. It may be however a hardware related issue of a missing or too high resistance pull-up, or strong crosstalk from other signals (possibly SDA) to the SCL node. As long as no I2C device is utilizing clock stretching, push-pull drive of SCL shouldn't be a problem.

P.S.: The I2C standard requires I2C devices to filter spikes at both bus lines. I'm missing this feature from the I2C core itself, however.