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Altera_Forum
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15 years ago

I2C Woes, Opencore and Terasic

I've been trying to get a functional I2C bus in my design for a while now with no luck. I've tried my own and a few open source cores. ALL of them have the same problem. I never receive ACKs. I canno...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Are the two waveform captures supposed to be of the same attempted I2C sequence?

You can't see all the address bits in the second image, but the address bits seem to be mirror images of each other as if one was sent MSB first (correct) and the other LSB first (wrong).

Edit:

Now that I look at it again, you can ignore the above comment. The address bits (at least the ones we can see) do look consistent between the two images as FvM has pointed out in the next post.