how to setup the registor of the triple speed ethernet megacore function ?

Up to 32 phy device can be addressed because the mdio protocol address field is 5bit wide.

At low level, mdio protocol specifies the PHY address (Addr1) and PHY register address (Addr2) on every transaction.

The TSE mdio interface relieves you from bothering with the protocol maps for your convenience the register space of (up to) 2 PHYs into mac memory space, in the address range 0x200 to 0x2FC.

This way you don't need to manually set the phy address for each transaction. Whevener you R/W mac registers 0x200 to 0x27C, the mdio interface automatically generates the transaction to access the correct register of the PHY whose address is mdio_addr0. When you R/W mac registers 0x280 to 0x2FC the PHY with address mdio_addr1 is accessed.

If you have more than 2 PHYs, you'd have to change mdio_addr0 or mdio_add1 according to the address of the PHY you need to access.