How to make Master module to access the avalon MM slave peripherals

Thanks for your reply...

Actually, I have a microcontroller which sends commands to my FPGA. There is different images I need to store in UFM of FPGA and with every command (from uC) I need to show the respective image on the screen. This is the rough structure. Since UFM is slave connected to Avalon MM fabric and I want to make controlling module which behave as Master. What should I do?? You are saying JTAG master can access the UFM. Can I use it to do my task??? But with the JTAG master do I need to use USB blaster. I am confused with that. It would be nice if you suggest suitable solution. If you dont understand I can explain it in more detail.

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Hi,

I am writing code for making the master module to access the avalon MM slave peripherals (e.g. UFM and ADC). But first I need to know that is there any IP available to access these modules (UFM and ADC)?? I dont want to use NIOS II processor as Master because I dont have enough memory. I am using MAX10SAU169C8GES FPGA. What could be the possible solutions??

Thanks in advance for the comments and suggestions.

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You may try to check the following pages to see if can find any related design for reference:

http://www.alterawiki.com/wiki/special:categories

https://www.altera.com/products/intellectual-property/reference-designs.html