How to check Gain with ModelSim-ASE (FIR Compiler)

If you've never designed analog filters before, take a read of this document:

http://www.ovro.caltech.edu/~dwh/carma_board/ad9956_tests.pdf

Look on pages 18 to 26, where I document how I designed a 50MHz low-pass filter. On p25 note how the stop-band rejection of the filter is better than 60dB a little above 50MHz. This signal could be sampled using an ADC clock at around 120MHz, and the aliased energy would be less than the quantization noise floor of the ADC, i.e., the aliased energy would make no difference to the sampled signal.

Your 1.25MHz signal would need to be analog filtered in a similar way before sampling it with an ADC.

Cheers,

Dave