Forum Discussion
Altera_Forum
Honored Contributor
10 years agoHow do I constrain VIP (QSYS) build?
Hello Guys, I have designed a simple VIP designed with QSYS. The design has The following IPs: Frame_Reader, Sequencer, LPDDR2 and ITC. My question is, how do I properly constr...
Altera_Forum
Honored Contributor
10 years agoAnother question, how do I Signal-Tap inside the QSYS block?
Thanks, S.