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Altera_Forum
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16 years ago

How can I use Altera's HP DDR controller for fast 8x64 read?

Hi, A newbee's question. Needs suggestion and confirmation. I have an application in SOPC. There are 2-3 masters that need to access a DDR SRAM. The data width for all masters are 64bit...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Jake,

Thanks for your suggestion. I have tried adding an pipeline bridge.

However, it takes ~26 clks for each reading. 8 reading takes 8x26

= ~ 208 clks. My understanding is that pipeline allows another reading

starts without receiving readdata_valid for the earlier reading request.

Have I set something wrong?

Best,

Kevin