Honored Contributor
Honored ContributorQuestion:
Assume that you have the hardware wired up correctly (clock, control and data path) MAC Config: 1. Do you set the MAC address register 1 (lower 4 bytes) and 2 (uppper 2 bytes)? Do your ARP packet contains the MAC address of the MAC you set? The MAC will not pass through any packet to the Avalon-ST interface if the unicast MAC address is not match if it is not work in the promiscuous mode. However packet with broadcast packet will get through. Suggestion: set the command config register "promiscuous" bit to true, so that any packets detected in the network will get to the Avalon-ST side. 2. Do your system successfully done with software reset? Tight the software reset bit to an LED. This is a self clear command config register bit, if it doesn't not get through, you most probably didn't wire you clock to the MAC correctly. Make sure the RX_ENA command config bit is not zero, and the MAC Internal Loopback bit is of value zero too. What registers should be read out for debugging? 3. Turn on the statistic counters synthesis option, Read out the Receive Packet counters and Receive Error related counters. Use the push buttons on the board to select which counter's value to display on the LED. You only need to display the lower few bits of the counter. This give you a good insight on does MAC receive any packet and if yes why it doesn't pass through the packet by looking at the error counter; if no, then I would suggest you check the wiring of the GMII/MII interface and the clock signal wiring. If the wiring is right, what to do next? others that you might already know: 4. in the MAC configuration, you need to read out PHY autonegatiated speed (10/100/1000) and set the MAC to operate in correct mode through the ETHMODE bit. 10/100 and 1000 has different clocking, you should be able to read this in the user guide. 5. pin mapping on the hardware?
