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Altera_Forum
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14 years ago

HELP!!!Question about Avalon MM Slave Template Use

hi, I'm trying to have a coprocessor (that I built in Verilog and want to deploy on a FPGA) interact with a Nios II Processor System. By now I used the Altera Avalon MM Slave template so I can expose...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Ok, with the IOWR I kind of managed getting my data out of the Avalon Slave's first register but it's kind of strange, because I have to put an offset of 1 (thus accessing, if my base address is 0x800, 0x804) to see the data that I write to the register in 0x800 in my memory window. Furthermore I can't access my second register (that I also decided to put in Loopback for easier debugging, while adding a third register for the input only)...what should be the right offsets for the whole register file? I'm using 32 bits registers.