It's actually not that complicated. The error was caused by the fact that first adder couldn't determine how many bits it needs for the second input port (it was growing each iteration of the loop, due to the feedback adder). As dabuk correctly pointed out, you need to use an altbus block to set a fixed resolution for that input port, that way, the tool would know how to interpret it properly.
If you want to read up more about it, I would suggest starting with the DSP Builder User Guide, especially the design rule section (section 3 I believe). Also, DSP Builder comes with a lot of pre-built designs and demos, which will help you get up to speed. The pre-built designs are located under the default installation directory (C:/altera/80/quartus/dsp_builder/DesignExamples). Also if you want, you can simply type "demo" at the matlab command prompt to bring up the list of demos that came prepackaged with DSP Builder.
Hope that clears it up a bit...
I would recommend the DSP Builder User Guide... Specifically the section on the Design Rule... There is one particular rule that describes what you are seeing...