Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

HDL import - Multiple clock error

Hi, I was trying to convert the DE2 i2sound example (found in the DE2 demonstrations) to a DSP builder model file using HDL import technique. But i'm having a problem with multiple clocks ( 2 inte...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

thanks for your kind reply!

Unfortunately, i still can not compile the project. It is showing some problem about internally derived clock, which i cannot understand :(

I tried to compile the design directly from matlab, but it was no success. Then, i created the project file only and tried to compile it form quartus II. It showed the internally derive clock problem.

Please help...