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Altera_Forum's avatar
Altera_Forum
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14 years ago

HD SDI and Clocked Video Input issues

I'm having trouble integrating an HD SDI transceiver into my existing Stratix IV GX video design. I've ended up stripping it down to a single video path and integrating in the AN600 design to debug ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Good timing. I had just come that conclusion a few minutes before your post and kicked off a build with my core clock increased to 200MHz.

The CVI FIFO is set to 4000 per the UDX4.1 reference design.

The current design only outputs VGA resolution, but the next generation will move to an HD output, likely XGA or 1080i.

Thanks for the help!