GTS SDI II IP Core...what is the tx_vid_clkout frequency

Hi aucamera1 ,

Your configuration and 148.5 MHz refclk are likely fine. The ~58.3 MHz (HD) and ~116 MHz (3G) clocks indicate the SDI II IP selected a wider internal word width (effectively ~25 bits), 
which is expected behavior when the “Both BASE and PHY” wrapper auto-manages transceiver constraints on Agilex 5. 
If you need tx_vid_clkout = 74.25 MHz, regenerate the IP so you can select 20/40-bit widths, or synthesize 74.25 MHz externally and re-time.
Your numbers line up with the SDI II IP auto-selecting a wider internal parallel word width than the “classic” 20-bit/40-bit path. In the SDI II transmitter, the user video clock (tx_vid_clkout) is essentially:

• tx_vid_clkout ≈ serial line rate / internal TX parallel word width

If the IP uses:

• 20-bit width (HD) → 1.485/20 = 74.25 MHz
• 25-bit width (HD) → 1.485/25 = 59.4 MHz
• 40-bit width (3G) → 2.97/40 = 74.25 MHz
• 25-bit width (3G) → 2.97/25 = 118.8 MHz
• 50-bit width (3G) → 2.97/50 = 59.4 MHz

Your measurements:

• ~58.3 MHz in HD mode is close to the ~59.4 MHz expected for a 25-bit path (allowing for measurement tolerance and fractional-rate variants).

Regards,
Wincent