GTS PMA/FEC Direct set-up

I'm not sure this question is posted into the proper forum, it seems more like an FPGA IP forum topic.

Where are the hex addresses defined from in the /src folder?

The example designs generated for the GTS IP generally connect one JTAG Avalon Master Bridge to the subordinate/slave interface of the IP core alone. So the address map that the system console scripts are accessing are defined by the GTS IP core itself. This is a rather complex core with multiple functions define a different base addresses within the IP core itself but you should be able to correlate the references that you see in the system-console scripts to the various register maps defined in the user guide.

Is there a standard way to go about integrating this example into a larger project?

This is a standalone design example that gets generated to evaluate the IP in this standalone configuration. There is no standard way to integrate this example into a larger project. Fundamentally, once you understand how the IP core operates in the mode that you're interested in using, you would then determine what makes sense from an implementation perspective to fit this functionality into your larger project. But since there are many different applications that the GTS can be integrated into, there is no standard way to do this. It's possible that you may find other system level example designs that would demonstrate a specific implementation of the GTS in that use case which may provide a better example of how it could be implemented in that specific use case.