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Altera_Forum
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18 years ago

GMII <-> MII bridge in MAX II CPLD ?

Hi Folks, In my board, I would like to use GMII to MII bridge in MAX II CPLD. But I don't have idea of > Whether it can be used in MAX II CPLD (LE utilization and device electrical characteri...
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Altera_Forum
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18 years ago

In terms of CPLD complexity, I expect that MAX II would be able to realize the interface. But RGMII is utilizing a DDR transmission (dual edge). MAXII unlike e.g. Cyclone FPGA has no dedicated DDR I/O circuit. So a combination of dual-edge synchronous and asynchronous logic must be used. I doubt, if the timing requirements can be met at 125 MHz with this technique.