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Altera_Forum
Honored Contributor
Honored ContributorGate level simulation in ModelSim with DSP Builder generated designs
I try to further verify my design in DSP-Builder by applying gate-level simulation in Altera-ModelSim. But some modules which have no problems in RTL simulation do not work in the port-synthesis and ...
Altera_ForumHonored Contributor
Honored Contributoryou shouldn't have to compile any libraries when using ModelSim-AE.
i'm not sure what the problem is but i recommend trying to simulate using the NativeLink flow which usually does a good job setting up the simulation: http://www.altera.com/literature/hb/qts/qts_qii53001.pdf
