Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHello,
I believe the deinterlacer and the clipper are operating as they are supposed to in your design. The deinterlacer propagates the interlaced control packets it receives and adds a valid progressive control packet into the stream just before sending an image packet. The last packet is the packet that counts so this is fine. The same applies to the clipper; the valid packet is sent just before the image. Try to trigger on the sop of type 0 and hopefully you will be able to see the control packet you are interested in just before that. The flickering might be related to throughput issues (overflowing CVI or starved CVO). It looks like there is no frame buffering in your system. Even if your input and output frame rates are the same you may have built a system that cannot possibly work with a genuine video input if you are doing a lot of clipping. What is Out_Clip doing? Do you get a stable output when using the interlaced TPG? You may want to have a look at the Video IP example design if you have not already: http://www.alteraforum.com/forum/showthread.php?t=19710