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Altera_Forum
Honored Contributor
12 years agoIf you review the Quartus compilation port, you'll notice that a lock frequency range is reported for every PLL under Fitter/Resource Section/PLL Summary. It's ususally in a 1:2 range, mostly below the nominal reference frequency. For application needing a larger range, e.g. digital video interfaces, reconfiguration based on a frequency measurement should be considered as already suggested.