Frame Reader Initialization

Hello, your post is very usful.

I want to implement a Frame Reader which should read vide frames data from SDRAM and send its AVALON Video protocol to an Clocked video output ip to be displayed on a screen.The setting of the frame reader is :

Bits per pixel per color plane: 8

Number of color planes in parallel: 3

Number of color planes in sequence: 1

Maximum Image width: 800

Maximum Image height: 600

Master port width: 32

Read master FIFO depth=Read master FIFO burst target: 64

Use separate clock for the Avalon MM master interface: unchecked

and read the frames from 2 memory locations.I will use the interrupt register to prevent the data lost and indicat the frame completion.

At the begining of the siftware , i reset this register . but when reading it the interrupt register read 0 not 1.

Is there any wrong in my software which is attached below.

Kindly advise . Your reply will be highly appreciated.Waiting your reply ASAP

while(1)

{

alt_u32 a , interrupt , Frame0_Select , Frame0_Base_Address , Frame_0_Words , Frame_0_Single_Cycle , Frame_0_Reserved , Frame_0_width , Frame_0_height , Frame_0_progressive , Frame_0_start;

//master port width =32(R0 byte,B0 byte,G0 byte,empty byte)

IOWR(ALT_VIP_VFR_0_BASE, 2, 2); // reset the interrupt???????

interrupt=IORD(ALT_VIP_VFR_0_BASE, 2);// it always red 0??????

IOWR(ALT_VIP_VFR_0_BASE, 3, 0); // Frame0 Select

Frame0_Select=IORD(ALT_VIP_VFR_0_BASE, 3);

IOWR(ALT_VIP_VFR_0_BASE, 4, ALTMEMDDR_BASE);

// Frame 0 Base Address

Frame0_Base_Address=IORD(ALT_VIP_VFR_0_BASE, 4);

IOWR(ALT_VIP_VFR_0_BASE, 5, 480000);

// Frame 0 Words => (640*480*3*8)/24

Frame_0_Words=IORD(ALT_VIP_VFR_0_BASE, 5);

printf("Frame 0 Words\n");

IOWR(ALT_VIP_VFR_0_BASE, 6, 480000);//Frame0Single Cycle Color Patterns

Frame_0_Single_Cycle=IORD(ALT_VIP_VFR_0_BASE, 6);

printf("Frame 0 Single Cycle Color Patterns\n");

IOWR(ALT_VIP_VFR_0_BASE, 7, 0); // Frame 0 Reserved Bit

Frame_0_Reserved=IORD(ALT_VIP_VFR_0_BASE, 7);

printf("Frame 0 Reserved Bit\n");

IOWR(ALT_VIP_VFR_0_BASE, 8, 800);

Frame_0_width=IORD(ALT_VIP_VFR_0_BASE, 8);

printf("frame 0 Width\n");

IOWR(ALT_VIP_VFR_0_BASE, 9, 600);// Frame 0 Height

Frame_0_height=IORD(ALT_VIP_VFR_0_BASE,9);

IOWR(ALT_VIP_VFR_0_BASE, 10, 3); // Frame 0 Interlaced => 3 = 0011

Frame_0_progressive=IORD(ALT_VIP_VFR_0_BASE, 10);

IOWR(ALT_VIP_VFR_0_BASE, 0, 1); //start reading

Frame_0_start=IORD(ALT_VIP_VFR_0_BASE, 0);

IOWR(ALT_VIP_VFR_0_BASE, 2, 2);// reset the interrupt

a=IORD(ALT_VIP_VFR_0_BASE, 2);

while (a&&0x02==1)

{

a=IORD(ALT_VIP_VFR_0_BASE, 2);

}

IOWR(ALT_VIP_VFR_0_BASE, 2, 2); // reset the interrupt

IOWR(ALT_VIP_VFR_0_BASE, 3, 1);// Frame1 Select

IOWR(ALT_VIP_VFR_0_BASE,11,ALTMEMDDR_BASE+0xE1000);//Frame address

IOWR(ALT_VIP_VFR_0_BASE, 12, 480000);// Frame 1 Words

IOWR(ALT_VIP_VFR_0_BASE, 13, 480000); // Frame 1Single Cycle Color

IOWR(ALT_VIP_VFR_0_BASE, 14, 0);// Frame 1Reserved Bit

IOWR(ALT_VIP_VFR_0_BASE, 15, 800);// Frame 1 Width

IOWR(ALT_VIP_VFR_0_BASE, 16, 600); // Frame 1 Height

IOWR(ALT_VIP_VFR_0_BASE, 17, 3);// Frame 1 progressive=> 3

IOWR(ALT_VIP_VFR_0_BASE, 0, 1);//start reading

IORD(ALT_VIP_VFR_0_BASE, 2);//read the interrupt register

a=IORD(ALT_VIP_VFR_0_BASE, 2);

while (a&&0x02==1)

{

a=IORD(ALT_VIP_VFR_0_BASE, 2);

}

}　

}