Frame Reader Initialization

I really don't get it working. I was thinking that I have got the following conditions:

8bits per pixel per color plane

3 color planes in parallel

Master port width 64Bit

onchip_ram with 32bit width

width 1024

height 768

SingleCycleColorPattern => 1024x768 = 786432 (like p. 5-28 right bottom)

Words => width of a word is 64bit, one SingleCycleColorPattern has 24bit so i can get 2 SingleCycleColorPatterns in every word. => 786432 / 2 = 393216

Progressive Output means 0011 for 4bit InterlacingParameters (see Table 4-4) this means 3 (=>0011).

So now I tried:

// Frame Select
         IOWR(ALT_VIP_VFR_0_BASE, 3, 0);
         // Frame 0 Base Address
         IOWR(ALT_VIP_VFR_0_BASE, 4, ONCHIP_MEMORY2_1_BASE);
         // Frame 0 Words
         IOWR(ALT_VIP_VFR_0_BASE, 5, 393216);
         // Frame 0 Single Cycle Color Patterns
         IOWR(ALT_VIP_VFR_0_BASE, 6, 786432); 
         // Frame 0 Reserved
         // IOWR(ALT_VIP_VFR_0_BASE, 7, 0);
         // Frame 0 Width
         IOWR(ALT_VIP_VFR_0_BASE, 8, 1024);
         // Frame 0 Height
         IOWR(ALT_VIP_VFR_0_BASE, 9, 768);
         // Frame 0 Interlaced
         IOWR(ALT_VIP_VFR_0_BASE, 10, 3); 
         // start Frame Reader
         IOWR(ALT_VIP_VFR_0_BASE, 0, 1);

But it seems wrong. Does not work. Can anyone approve my calculations or has got a demo or example configuration? PLEASE.