Thanks for your help kevin.
I think it does support interlaced video. The Video and image processing guide says: "Also, the Frame Reader must be configured with the starting address of the video frame in memory, and the width, height, and INTERLACED values of the control data packet to output before each video data packet." (page 5-29)
And in Table 5-11 (page 5-30) it says about the parameter interlaced/progressive: "Set via the Avalon Memory Mapped Slave control port, ALL VALUES SUPPORTED."
The corresponding register should be the one with offset 10 where I can set "the interlaced nibble used for the CONTROL PACKET associated with frame 0"
Examples for this control packet nibble are given in table 4-4. (page 4-8)
I have been browsing the datasheets a lot, but since my video output is not working I am afraid to have something gotten up the wrong way.