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Altera_Forum
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10 years ago

Frame rate conversion issue

Dear reader, I'm currently evaluating (video processing) DSP IP blocks using Quartus 15.0 and Qsys 15.0 but I am experiencing some issues. I have to solve them before purchasing licenses for ce...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

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What rate is the "afi_clk" from your memory controller?

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Cliff, thanks for your reply! I believe the "afi_clk" clock rate which I use to clock the interconnect is 150MHz, I added a picture from the DDR3 memory controller IP block (see below).

Kind regards, Richard.

http://www.alteraforum.com/forum/attachment.php?attachmentid=11405&stc=1