Forum Discussion
2 Replies
- Rahul_S_Intel1
Frequent Contributor
better to use from the FPLL
- Rahul_S_Intel1
Frequent Contributor
I am also assuming you are using Cylcone 10 GX
We are using the Cyclone 10 PCIe Hard IP. Is it acceptable to generate the CLKUSR clock from a PLL in the same device? We are not concerned about the delay that will be caused.
better to use from the FPLL
I am also assuming you are using Cylcone 10 GX