Forum Discussion
Altera_Forum
Honored Contributor
12 years agoThanks a lot for your answers!
Basically I just wanted to create a reference for PWM creation, but I used a slow custom updown counter. Now I am having problems with Timing requirements. I have my external crystal clock for DE0 Nano and inside the chip I have two PLLs (450MHz and 75MHz), some state machines and some other custom code. The code simulate4s perfectly but doesnt run correctly. I removed all warnings and now I try to see where the problem is. I changed the first PLL to 150MHz (that PLL is used for the PWM creation) and now it works. I constantly have a timing requirements not met and I was wondering what is the easiest way to tell the compiler to fit my design for 450MHz