FIR serial multichannel timing diagrams

Hello,

I am trying to implement Fully serial (15 bit input) 2 channel FIR filter with FIR compiler. I miss understandable desription of timing diagrams for this case. Espiecially how do I control sink_sop and sink_eop signals. Should I keep sink_sop=1 and sink_eop=0 for 16 cycles and then sink_sop=0 and sink_eop=1 for another 16 cycles to feed the input of the second channel?

I have attached simulation diagrams I get in ths case. The behaviour of source_eop is not clear for me. Can anyone providde me with the FIR serial multichannel timing diagrams, please?

Thanks for help.