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Honored Contributor
Honored ContributorFIR filter design with IEEE 754 half-precision floating point
Hi All We are in the initial phase of a project which implements processing of biomedical signals. I am trying to implement FIR filter with IEEE 754 half-precision (16-bit) floating point ari...
Altera_ForumHonored Contributor
Honored ContributorAs an additional comment, all required rounding/truncation/saturation operation are handled in the IEEE fixed point package.
A convenient way to implement FIR filters that take advantage of the FPGA hardware is to use the Altera FIR compiler.
