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Altera_Forum
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16 years ago

FIR Compiler 9.1 generate incorrect outputs

Hi, I created a simple simulink model using DSP builder 9.1 sp1 blocks. The model runs at 120Mhz with 20.02Mhz input signal. After generating 20Mhz cos and sin signals from NCO block, the...
Altera_Forum's avatar
Altera_Forum
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16 years ago

Kaz,

Please see the attached both I_out and Q_out samples. Before opening, you need to rename the extension to .mat format.

I collected 12000 samples from both.

Thanks.

Tim