fifo-less triple speed ethernet

I'm in the same boat..

Yes they are lightly documented in the user guide, but what does one "do" with those extra ports? In a single port design, I can click on "use internal fifos" and those ports vanish (presumably inside the black box), but I have to disable internal fifos to enable selecting up to 4 ports.

In my case I want to verify a quad SGMII pinout in a Stratix IV before committing it to a PCB design. I don't care what kind of packet type comes in.

For the fifo status bits, I don't know what to feed them. I have 8 individual fifos with no status pins showing. I terminated the ethernet data paths thru a format converter - fifo - dma engine - internal ram. I could add a fifo flag, but what type, and how do I map 8 fifos worth of flags into a single port in SOPC builder?