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Altera_Forum
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11 years ago

FFT problem. Simulation vs HW's execution

Hi, I'm having some problems with the utilization of the FFT IP from altera. I have a architecture that uses 4 FFTs in paralel. The simulation in the modelsim the project is doing fine. But when I've...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

We really belive that the control is correct. Maybe the GIDEL plataform are reading the data in a wrong way, but I believe we are facing timimg problems, because using the frequency at 125MHz and 250MHz the plataform is doing fine. But only in this two frequency. In the sdc I've requested 250 MHz in the clock that is going to be used in my top module. So if I configure the clock to 100MHz, for example, the outputs of the FFTs are differents.

Thanks.