Forum Discussion
Altera_Forum
Honored Contributor
11 years agoFFT problem. Simulation vs HW's execution
Hi, I'm having some problems with the utilization of the FFT IP from altera. I have a architecture that uses 4 FFTs in paralel. The simulation in the modelsim the project is doing fine. But when I've...
Altera_Forum
Honored Contributor
11 years agoif internal clock is declared then it should be enough for fft check.
io constraints may also be relevant if fft inputs/outputs go across io. If your slack is positive then check inputs to all ffts in signaltap. even a single input variation such as a zero or repeated sample will result in difference as fft is frame based and the whole frame should be identical for all four ffts. Is your sampling rate correct (if different from system clock) you may also try single tone input to see a line spectrum indicating that it might be functionally correct after all.