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Altera_Forum
Honored Contributor
Honored ContributorFFT output scaling
I will be grateful if anyone can help me here, because I'm having a really hard time trying to sort things out. I've already made a VHDL test bench to simulate a transform of a sinusoidal signa...
Altera_ForumHonored Contributor
Honored Contributorits more intuitive to work with natural order, but it uses quite a bit more RAM. depending on your application, you might develop in natural order but change to bit reversed order to save resources in the final design
