Failed to simulate DMA_Chaining example

This is the design generated when I create a pcie module from PCIe compiler wizard.

I'm using QuartusII9.1SP2

these are the library the ModelSIM searched.

C:\altera\91\modelsim_ase\altera\verilog\altera_mf

# C:\altera\91\modelsim_ase\altera\verilog\220model

# C:\altera\91\modelsim_ase\altera\verilog\sgate

# C:\altera\91\modelsim_ase\altera\verilog\altgxb

# C:\altera\91\modelsim_ase\altera\verilog\stratixiigx_hssi

# C:\altera\91\modelsim_ase\altera\verilog\stratixiv_hssi

# C:\altera\91\modelsim_ase\altera\verilog\stratixiv_pcie_hip

# C:\altera\91\modelsim_ase\altera\verilog\arriaii_hssi

# C:\altera\91\modelsim_ase\altera\verilog\arriaii_pcie_hip

# C:\altera\91\modelsim_ase\altera\verilog\cycloneiv_hssi

# C:\altera\91\modelsim_ase\altera\verilog\cycloneiv_pcie_hip

# C:\altera\91\modelsim_ase\altera\verilog\hardcopyiv_hssi

# C:\altera\91\modelsim_ase\altera\verilog\hardcopyiv_pcie_hip

# D:\Work\IPProbe\PCIe\VerisimPCIe\pcie_small_examples\chaining_dma\testbench\work