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Altera_Forum
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10 years ago

External Boot Flow - Bootload second Nios

Hi, as described in this (http://www.alteraforum.com/forum/showthread.php?t=46963&p=193556#post193556) thread I deploy two NIOS Gen2 cores of which one is bootloaded via EPCS. Once this is up I...
Altera_Forum's avatar
Altera_Forum
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10 years ago

For the people of the future:

I - once again - stumbled over the data cache. I had to flush the data cache of the "master" NIOS after I copied the instructions from EPCS to the slave NIOSs RAM. Somehow I assumed that the EPCS functions are based upon __builtin_stwio/__builtin_ldwio.

Just to clarify: I don't put the unconditional branch at the the reset vector address as described here (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/an/an458.pdf). Just copy the various boot records from the EPCS to the according locations in RAM, flash the dcache, release the reset and the system is running.

Just to mention: For timing reasons I placed a pipeline bridge between the master NIOS and some peripherals (the SDRAM of the slave). So obviously the address offset of the pipeline bridge has to be added to the memory locations extracted from the boot records.