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Altera_Forum
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15 years ago

Evaluation of the latency of each module on my design

Hi, In order to know how fast is my FPGA Stratix II 2SEP2S180F1020C3, I would like to evaluate the latency of my design on Alera Dsp Builder. I read that an approach is to obtain the latency of t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

You will need to synthesize your design with Quartus II and use timequest afterwords to analyze timing and detect the critical paths.