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Altera_Forum's avatar
Altera_Forum
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12 years ago

Ethernet IP Core

Hi, I would like to ask You the next question. The sending process to Avalon Bus controlled by ff_tx_sop and ff_tx_eop signals (in addition to other signals). In order to send user's data,...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

You have to build the full frame. This is described in Table 7-8 of the user guide (ug_ethernet.pdf) [among other places]

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ff_tx_sop - startofpacket - Transmit start of packet. Assert this signal when the first byte in the frame (the first byte of the destination address) is driven on ff_tx_data.

--- Quote End ---

--- Quote Start ---

ff_tx_eop - endofpacket - Transmit end of packet. Assert this signal when the last byte in the frame (the last byte of the FCS field) is driven on ff_tx_data.

--- Quote End ---