Occasional Contributor
New Contributor"TTK failed reading from PHY slave, cannot enable TTK functionality for this PHY. Please verify the reconfig_clk is running and ensure this PHY is not stuck in reset."
In most cases, this failure is due to the wrong setting on the reconfig_clk to PHY, which may be the different input pin in .qsf
In the compilation design you shared, the reconfig_clk was auto assigned to pin AU15, which should be an clock input of the dev kit.
For your design, you'd assign this pin to a 100MHz clock input (if you are not using dev kit), or AR36/AR37 which should be the 100M sysclk input on the dev kit.
Also there's chance that clock is correct but reset was pulled, so PHY stuck in the reset mode, this you may also check the reset source or use ISSP to control the reset signal for a try.
