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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Errors building Clocked Video Output

I added a Clocked Video output to a design and feed it with a scatter-gather DMA. There are two Avalon ST adapters in the path to make it work. I'm getting a bunch of errors like this: "...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

If really SGDMA and Clocked Video Input / Output could not be put together in QSys, then Altera must have provided some kind of "Streaming < - > VIP" converter...

Does it exist, maybe even as a QSYS component?