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Altera_Forum
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14 years ago

error in compiling the RapidIO IP for Stratix II GX: EP2SGX90FF1508C3.

Hi, I generated the rapidio IP from the MegaWizard Plug-in Manager for the device Stratix II GX: EP2SGX90FF1508C3. It generated the codes corresponding to the parameter specified in the MegaW...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Your design is using to many input/output ports on the FPGA. Try to reduce them. 730 ports is a lot...