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HBhat2's avatar
HBhat2
Icon for Contributor rankContributor
5 years ago

E-Tile Transceiver " Reverse Parallel Loopback"

Hi, I want to use " Reverse Parallel Loopback" feature for some protocol analyzer application. I understood that in L-tile, Reverse serial loopback mode doesn't support for GXT (more than 17.6Gbp...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

HI HPB,


I consulted Intel internal team but so far we are not aware of any speed limit requirement on Etile reverse loopback path.


However, one important requirement in using reverse loopback path is (0ppm difference between the transmit and receive frequencies).

  • You need to take care of ppm difference between your external test equipment and FPGA Etile refclk else data re-transmission from Etile Rx back to Tx path may fail


Thanks.


Regards,

dlim


HBhat2's avatar
HBhat2
Icon for Contributor rankContributor
5 years ago

Hi @Deshi_Intel ,

Thanks for checking internally & confirming that there is no speed limit for reverse serial loopback in E-tile Transceivers.

Can you provide some more details/document references on "(0ppm difference between the transmit and receive frequencies)"?

With Regards,

HPB