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Altera_Forum
Honored Contributor
16 years agodummy core between two VIP using SOPC builder
Hi all I am working on a simple Verilog block that should interface with avalon-ST and avalon-ST protocol. right now, the code I've written for sopc builder is this --- Quote Start --- ...
Altera_Forum
Honored Contributor
16 years agoHi
no, I didn't, but for my application is not a big problem a latency of 3 clock cycles.. using "assign" instead of registers, the block does not need latencyes (is like a wired connection...) beste regards Phate