Forum Discussion
Altera_Forum
Honored Contributor
13 years agodsp builder-quartus project
hello, i have created a project for multichannel duc, and able to generate quartus project file. the top module is entity duc is port ( channel : in std_logic_vector(7 d...
Altera_Forum
Honored Contributor
13 years agoIf you want a processor to update your coefficients then this bus is generated(data, address, write...). If you don't want update then set your filter block to constant coeffs and the bus will disappear.
By the way channel input is not needed ! as it is not connected internally as far as I know.