Forum Discussion
4 Replies
- Altera_Forum
Honored Contributor
Make sure your design has a Clock block (from the AltLab sub-library) and then open its parameters. There should be an option "Export As Output Pin".
The option is also available on the Clock_Derived block. - Altera_Forum
Honored Contributor
I actually did that , but there is no signal at the FPGA pin, I also did it with a PLL which generates internal clocks with frequencies that are multiples of the frequency of the system clock
And set pin out with the Quartus II Pinout Assignments: Pin name : PLL_clk0 Pin location : Pin_F3 And I get this Matlab Error Pin Assignment Error: Port PLL_clk0 referenced in Pin Assignment dspddcejem/Quartus II Pinout Assignments cannot be found. Error: Error during compilation: Error: Error analyzing model see log for details. What am I doing wrong? Do I have to include a output port? - Altera_Forum
Honored Contributor
Hello, I turn 'Export As Output Pin' to 'On' to export this clock as an output pin, but how can I assign this to a Altera Quartus II Pinout (FPGA pin) in the simulink enviroment ?
- Altera_Forum
Honored Contributor
I'm not sure this is possible. You could load the quartus project created by DSP Builder and manually add this pin assignment.