Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorDSP builder Fatal Error
I tried to import an HDL in simulink, but an error message pops up and says "error generating simulation model" and the Matlab workspace shows the message: "DSP Builder Fatal Error: decision_1: Expec...
Altera_ForumHonored Contributor
Honored ContributorHi dabuk,
yes, compilation and synthesis are succesful in Quartus, actually also in simulation the design seems to be ok. The problem occur only when I try to import the project to Simulink. I thought that the problem was the number of input ports, so I reduced it, but the problem persists...
