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Altera_Forum
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14 years ago

Driving FPGA -> Host DMA with PCIe (hard IP in Cyclone IV)?

Hello all, I am trying to port an existing design which uses a PCI interface to a new board which uses the PCIe interface. Driving a DMA transfer on PCI was fairly simple, you write to t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

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I'm sorry, I'm not sure about register inside of the core.

But as I mentioned, you can use bar access to DMA status register directly and be able to read out its status.

--- Quote End ---

_Which_ DMA status register?

I'm not using the DMA controller, my logic drives a DMA tansfer directly.

This has to be able to read the DMA status but I can't see anything in the

PCIe user guide about a 'finished the transfer' register.

Nial.